Scrambling Techniques for Digital Transmission

Scrambling Techniques for Digital Transmission

by Byeong G. Lee, Seok C. Kim

Paperback(Softcover reprint of the original 1st ed. 1994)

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Overview

Scramblers and shift register generators (SRG) have been used for decades in the shaping of digital transmission signals and in generating pseudo-random binary sequences for transmission applications. In recent years more attention has been paid to this area than ever before due to the change of today's telecommunication environment. This publication presents the theory and applications of three scrambling techniques - Frame Synchronous Scrambling (FSS), Distributed Sample Scrambling (DSS) and Self Synchronous Scrambling (SSS) with an emphasis on their application in digital transmission. Based on the authors' research over the past ten years, this is the first book of its kind.

Product Details

ISBN-13: 9781447132332
Publisher: Springer London
Publication date: 01/19/2012
Series: Telecommunication Networks and Computer Systems
Edition description: Softcover reprint of the original 1st ed. 1994
Pages: 448
Product dimensions: 6.10(w) x 9.25(h) x 0.04(d)

Table of Contents

I Preliminaries.- 1 Digital Transmission and Scrambling.- 1.1 Digital Transmission Systems.- 1.2 Scrambling Functions in Digital Transmission.- 1.3 Digital Signals and Scrambling.- 1.4 Packet-Mode Data Transmission and Scrambling.- 2 Fundamentals of Scrambling Techniques.- 2.1 Frame Synchronous Scrambling.- 2.2 Distributed Sample Scrambling.- 2.3 Self Synchronous Scrambling.- 2.4 Serial Scrambling.- 2.5 Parallel Scrambling.- 2.6 Multibit-Parallel Scrambling.- II Frame Synchronous Scrambling.- 3 Introduction to Frame Synchronous Scrambling.- 3.1 Operation of FSS.- 3.2 Scrambling Sequences.- 3.3 Shift Register Generators.- 3.4 Organization of the Part.- 4 Sequence Spaces.- 4.1 Definition of Sequence Space.- 4.2 Elementary Basis.- 4.3 Primary Basis.- 4.4 Polynomial Expression of Sequences.- 4.5 Sequence Subspaces.- 4.6 Minimal Sequence Spaces.- 5 Shift Register Generators.- 5.1 Shift Register Generator.- 5.2 Minimal Spaces for SRG Sequences.- 5.3 SRG Spaces.- 5.4 SRG Maximal Spaces.- 5.5 Basic SRGs.- 5.6 Simple and Modular SRGs.- 6 Serial Frame Synchronous Scrambling.- 6.1 Pseudo-Random Binary Sequences.- 6.2 Primitive Sequence Spaces.- 6.3 PRBS Generators.- 7 Parallel Frame Synchronous Scrambling.- 7.1 Parallel Scrambling Sequences.- 7.2 Decimated Sequences.- 7.3 Decomposition of Sequences.- 7.4 Decimation of Irreducible Sequences.- 7.5 Decimation of Power Sequences.- 7.6 Decimation of PRBS.- 7.7 Decimation of Sum Sequences.- 7.8 Parallel Shift Register Generators.- 7.9 Minimal Realizations of PSRG.- 7.10 Simple Realizations of Minimal PSRG.- 8 Multibit-Parallel Frame Synchronous Scrambling.- 8.1 Multibit-Parallel Sequences.- 8.2 Interleaved Sequences.- 8.3 Minimal Space for Parallel Sequences.- 8.4 Parallel Sequences for Irreducible Sequences.- 8.5 Realizations of PSRGs for MPFSS.- 9 Applications to Scrambling in SDH/SONET Transmission.- 9.1 Scrambling of SDH/SONET Signals.- 9.2 Bit-Parallel Scrambling of STM-1/STS-1 Signals.- 9.3 Byte-Parallel Scrambling of STM-N Signal.- 9.3.1 Byte-Parallel Scrambling of STM-4 Signal.- 9.3.2 Byte-Parallel Scrambling of STM-16 Signal.- 9.4 Byte-Parallel Scrambling of STS-N Signal.- 9.4.1 Byte-Parallel Scrambling of STS-3 Signal.- 9.4.2 Byte-Parallel Scrambling of STS-12 Signal.- III Distributed Sample Scrambling.- 10 Introduction to Distributed Sample Scrambling.- 10.1 Operation of DSS.- 10.2 Three-State Synchronization Mechanism for DSS.- 10.3 Organization of the Part.- 11 Prediction of Scrambling Sequences.- 11.1 Scrambling Space.- 11.2 Scrambling Maximal Space.- 11.3 Scrambling Maximal Spaces for BSRGs.- 11.4 Prediction of Scrambling Sequences.- 12 Serial Distributed Sample Scrambling.- 12.1 Mathematical Modeling.- 12.2 Scramblers for DSS.- 12.2.1 Scrambler SRGs.- 12.2.2 Sampling Times.- 12.3 Descramblers for DSS.- 12.3.1 Descrambler SRGs.- 12.3.2 Correction Times and Correction Vectors.- 12.3.3 Efficient Realization Methods.- 12.4 DSS with Minimized Timing Circuitry.- 12.4.1 Concurrent Sampling.- 12.4.2 Immediate Correction.- 13 Parallel Distributed Sample Scrambling.- 13.1 Considerations for Parallel DSS.- 13.2 PSRGs for PDSS.- 13.3 Parallel Sampling for PDSS.- 13.4 Parallel Correction for PDSS.- 13.4.1 Single Correction.- 13.4.2 Double Correction.- 13.4.3 Multiple Correction.- 14 Multibit-Parallel Distributed Sample Scrambling.- 14.1 Considerations for MPDSS.- 14.2 PSRGs for MPDSS.- 14.3 Parallel Sampling for MPDSS.- 14.4 Parallel Correction for MPDSS.- 15 Three-State Synchronization Mechanism under Sample Errors.- 15.1 Three-State Synchronization Mechanism.- 15.2 Effects of Errored Samples in Acquisition State.- 15.3 Synchronization Verification in Verification State.- 15.4 Synchronization Confirmation in Steady State.- 16 Applications to Cell-Based ATM and High-Speed Data Networks.- 16.1 Scrambling of Cell-Based ATM Signals.- 16.2 Equivalent DSS with Minimized Timing Circuitry.- 16.3 An Optimal DSS Design.- 16.4 Parallel DSS for Cell-Based ATM Signals.- 16.5 Design of Three-State Synchronization Mechanisms.- 16.5.1 Windowed-Observation State Transition Scheme.- 16.5.2 Thresholded-Counting State Transition Scheme.- 16.5.3 Performance Evaluation.- 16.6 Applications to High-Speed Data Networks.- IV Self Synchronous Scrambling.- 17 Introduction to Self Synchronous Scrambling.- 17.1 Operation of SSS.- 17.2 Signal Alignment.- 17.3 Organization of the Part.- 18 Serial Self Synchronous Scrambling.- 18.1 Scrambled Signals.- 18.2 Descrambled Signals.- 18.3 Self-Synchronization.- 18.4 Error-Multiplication.- 19 Parallel Self Synchronous Scrambling.- 19.1 Parallel-Scrambled and -Descrambled Signals.- 19.2 Parallel Self Synchronous Scrambler.- 19.3 Parallel Self Synchronous Descrambler.- 20 Applications to Scrambling in SDH-Based ATM Transmission.- 20.1 Scrambling of SDH-Based ATM Signals.- 20.2 Parallel SSS for Cell Scrambling in SDH-Based ATM Transmission.- 21 Signal-Alignment with Parallel Self Synchronous Scrambling.- 21.1 Operators for Functional Processors.- 21.2 Number-Operators for Operators.- 21.3 Signal-Detection Tables.- 21.4 Signal-Detection Table Characteristic Expressions.- 21.5 Signal-Detection Tables for Various System Configurations.- 21.5.1 Scrambler Based Systems.- 21.5.2 Permuter Based Systems.- 21.5.3 Permuter-Scrambler Based Systems.- 21.5.4 Scrambler-Permuter Based Systems.- 21.5.5 Scrambler-Permuter-Scrambler Based Systems.- 21.5.6 Permuter-Scrambler-Permuter Based Systems.- 21.5.7 Summary of Signal-Detection Tables.- 21.6 Applications of Signal-Detection Tables to Signal-Alignment.- Appendices.- A Facts from Abstract Algebra.- A.1 Field.- A.2 Extension of Fields.- A.3 Irreducible Polynomials.- A.4 Primitive Polynomials.- A.5 Others.- B Facts from Linear Algebra.- B.1 Vector Space.- B.2 Minimal Polynomials of Matrices.- B.3 Properties of Companion Matrix.- B.4 Similarity of Matrices.- References.

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